The present invention relates in general to semiconductor technology, and more particularly to semiconductor hybrid substrates and methods for forming the same.
Typically, both n-type and p-type transistors are formed on a wafer having a particular crystalline orientation. N-type transistors have an electron mobility in the [100] crystalline orientation higher than in the [110] crystalline orientation. Whereas, p-type transistors have a hole mobility in the [110] crystalline orientation higher than in the [100] crystalline orientation. Accordingly, hybrid structures having (100) regions and (110) regions are provided to accommodate n-type transistors and p-type transistors on the same substrate, respectively. However, the known techniques for forming such hybrid structures require complex process technologies with tight process windows, and thus are not cost effective. Further, these techniques often suffer from defect related issues.
Thus, there is a need for hybrid structures with superior characteristics and cost effective techniques for forming the same.